Trends in megabit DRAM circuit design
- 7 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The state of the art in megabit dynamic RAM (DRAM) circuit and chip design is reviewed in terms of essential design parameters such as signal-to-noise ratio (S/N), power dissipation, speed and power supply standardization. On the basis of this discussion, some possibilities for capacities greater than 16 Mb are presented, stressing the role of BiCMOS technology. It is shown how S/N ratio, power dissipation and speed are closely related to continued DRAM progress. From the DRAM trends, it is predicted that the current DRAM technology might be diversified to both large-memory-capacity-oriented technology and to high-speed-oriented technology, posing power supply standardization as a continuing serious concern.Keywords
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