'Zone-refining' techniques for IC layout compaction
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 9 (2), 167-179
- https://doi.org/10.1109/43.46783
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
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