A comprehensive analytical subthreshold swing (S) model for double-gate MOSFETs
- 7 August 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 49 (6), 1086-1090
- https://doi.org/10.1109/ted.2002.1003757
Abstract
A general analytical subthreshold swing (S) model for symmetric DG MOSFETs is derived using evanescent-mode analysis. Through a concept of effective conducting path, it explains a unique doping concentration (N/sub A/) dependence of S, providing a unified understanding of previous S models and leading to a new improved S model for undoped DG MOSFETs. Compact, explicit expressions of a scale length are derived, which expedite projections of scalability of DG MOSFETs and its requirement.Keywords
This publication has 10 references indexed in Scilit:
- Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Evanescent-mode analysis of short-channel effects in fully depleted SOI and related MOSFETsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETsIEEE Transactions on Electron Devices, 2001
- Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETsIEEE Electron Device Letters, 2000
- An analytical solution to a double-gate MOSFET with undoped bodyIEEE Electron Device Letters, 2000
- Electronic structures and phonon-limited electron mobility of double-gate silicon-on-insulator Si inversion layersJournal of Applied Physics, 1999
- Generalized scale length for two-dimensional effects in MOSFETsIEEE Electron Device Letters, 1998
- Scaling-parameter-dependent model for subthreshold swing S in double-gate SOI MOSFET'sIEEE Electron Device Letters, 1994
- Scaling theory for double-gate SOI MOSFET'sIEEE Transactions on Electron Devices, 1993
- Monte Carlo simulation of a 30 nm dual-gate MOSFET: how short can Si go?Published by Institute of Electrical and Electronics Engineers (IEEE) ,1992