Monolithic integration of a pin photodiode and a field-effect transistor using a new fabrication technique—graded step process

Abstract
A new fabrication technique of optoelectronic integrated circuit’s (OEIC’s), the graded step process, has been developed and found to improve the photolithographic yield and the overall process reproducibility. By applying this technique, a laterally integrated pin photodiode/field-effect transistor has been fabricated and shown to exhibit a high-speed response and a high sensitivity. This result indicates the potential of this process for applications to larger scale OEIC’s.