Charge transport and trapping in silicon nitride-silicon dioxide dielectric double layers

Abstract

Time, electric field, and temperature dependence of the flat‐band voltage shift in polysilicon‐silicon nitride‐(thick) silicon dioxide‐silicon capacitors subjected to high field stress has been studied in this paper. A ‘‘turn around’’ effect in the behavior of the flat‐band voltage shift versus time is observed, both in the accumulation and in the strong inversion mode, in the full range of temperatures investigated (77 K≤T≤453 K). Early time charge trapping seems to be dominated by transport of carriers, holes or electrons injected at the gate electrode, in the nitride layer. A Poole–Frenkel‐active trap for holes is determined to be located at 1.0 eV above the nitride valence‐band edge and a Poole‐Frenkel‐active trap for electrons 1.3 eV below the nitride conduction‐band edge. The dark contact current‐contact field characteristics at the silicon‐silicon dioxide interface are obtained at room temperature for both gate bias conditions. The contact current for positive gate voltage J⁺_ox appears to be dominated by tunneling (Fowler–Nordheim) emission of electrons from the silicon substrate. The contact current for negative gate voltage J⁻_ox is several orders of magnitude smaller than J⁺_ox and is tentatively attributed to tunneling (Fowler–Nordheim) emission of holes from the silicon substrate. The estimated tunneling barrier height for holes is φ^h₀ =4.4±0.1 eV.