Enhanced-Performance 4K X 1 High-Speed SRAM Using Optically Defined Submicrometer Devices in Selected Circuits
- 1 April 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 17 (2), 330-336
- https://doi.org/10.1109/jssc.1982.1051737
Abstract
No abstract availableKeywords
This publication has 13 references indexed in Scilit:
- Coupling capacitances for two-dimensional wiresIEEE Electron Device Letters, 1981
- A re-examination of practical scalability limits of n-channel and p-channel MOS devices for VLSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- A new edge-defined approach for submicrometer MOSFET fabricationIEEE Electron Device Letters, 1981
- Design and characteristics of the lightly doped drain-source (LDD) insulated gate field-effect transistorIEEE Transactions on Electron Devices, 1980
- New edge-defined vertical-etch approaches for submicrometer MOSFET fabricationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1980
- High-speed NMOS circuits made with X-ray lithography and reactive sputter etchingIEEE Electron Device Letters, 1980
- A novel submicron fabrication techniquePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Sub-micron polysilicon Gate CMOS/SOS technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Fabrication of submicron polysilicon lines by conventional techniquesApplied Physics Letters, 1975
- Design of ion-implanted MOSFET's with very small physical dimensionsIEEE Journal of Solid-State Circuits, 1974